I'm a Ph.D. candidate in Electrical & Computer Engineering at Cornell, advised by Mohamed S. Abdelfattah and a Student Researcher at Google Research.
I work on RL4E (teaching language models to make themselves more efficient).
Feel free to reach out if you'd like to chat AI, hardware-software co-design, or cool research ideas!
By using extreme sparsity and quantization, LogicNets turns each neuron into a tiny bundle of logic gates, porting an entire deep network into native FPGA fabric—no CPUs, no firmware loops. Just pure, automatic neuron-to-hardware mapping. The whole jet-tagging model streams through in under 15 ns, sustaining hundreds of millions of inferences per second, so the ATLAS or CMS Level-1 trigger can make classifications in real time and still have head-room for everything else on the board.